
High-level Synthesis, Lectures
Extent
5 crCourse dates
Application period
Fees
Campus
City
Faculty or school
Language of instruction
Code
Study fields
Mode of study
Study level
High-level Synthesis, 5 cr
Show
After the course, the student can implement digital systems using C/C++
based high-level synthesis (HLS). The student understands the whole HLS
design flow from specification to implementation on FPGA. He/she can
write the source code for the design, the test bench for it, and apply
various optimizations with the HLS tool. The student will also
understand the capabilities and limitations of HLS with respect to
traditional RTL design flow.
Core content
- Fundamentals of high-level synthesis
- Scheduling of IO and memories
- Sequential and combinational hardware
- Memory architecture
- Hierarchical design
- Example designs
Complementary knowledge
- General coding style, bit-accurate data types, pipelining, unrolling
- Unconditional/conditional IO
- Shift registers, multiplexors, shifters, accumulators, adder trees, lookup tables
- Memory organization, caching
- Sharing arrays, sharing control variables, reconvergence, channels, arbitration, feedback
- FIR filter, FFT examples
Common
Exercise:
12.01.2022 14:00 - 16:00, TAU Tietotalo TC219 FPGA-laboratorio (21)
19.01.2022 14:00 - 16:00, TAU Tietotalo TC219 FPGA-laboratorio (21)
26.01.2022 14:00 - 16:00, TAU Tietotalo TC219 FPGA-laboratorio (21)
02.02.2022 14:00 - 16:00, TAU Tietotalo TC219 FPGA-laboratorio (21)
09.02.2022 14:00 - 16:00, TAU Tietotalo TC219 FPGA-laboratorio (21)
16.02.2022 14:00 - 16:00, TAU Tietotalo TC219 FPGA-laboratorio (21)
23.02.2022 14:00 - 16:00, TAU Tietotalo TC219 FPGA-laboratorio (21)
09.03.2022 14:00 - 16:00, TAU Tietotalo TC219 FPGA-laboratorio (21)
16.03.2022 14:00 - 16:00, TAU Tietotalo TC219 FPGA-laboratorio (21)
23.03.2022 14:00 - 16:00, TAU Tietotalo TC219 FPGA-laboratorio (21)
30.03.2022 14:00 - 16:00, TAU Tietotalo TC219 FPGA-laboratorio (21)
06.04.2022 14:00 - 16:00, TAU Tietotalo TC219 FPGA-laboratorio (21)
20.04.2022 14:00 - 16:00, TAU Tietotalo TC219 FPGA-laboratorio (21)
27.04.2022 14:00 - 16:00, TAU Tietotalo TC219 FPGA-laboratorio (21)
Lecture:
11.01.2022 14:00 - 16:00, TAU Tietotalo TB206 harjoitussali (25)
18.01.2022 14:00 - 16:00, TAU Tietotalo TB206 harjoitussali (25)
25.01.2022 14:00 - 16:00, TAU Tietotalo TB206 harjoitussali (25)
01.02.2022 14:00 - 16:00, TAU Tietotalo TB206 harjoitussali (25)
08.02.2022 14:00 - 16:00, TAU Tietotalo TB206 harjoitussali (25)
15.02.2022 14:00 - 16:00, TAU Tietotalo TB206 harjoitussali (25)
22.02.2022 14:00 - 16:00, TAU Tietotalo TB206 harjoitussali (25)
08.03.2022 14:00 - 16:00, TAU Tietotalo TB206 harjoitussali (25)
15.03.2022 14:00 - 16:00, TAU Tietotalo TB206 harjoitussali (25)
22.03.2022 14:00 - 16:00, TAU Tietotalo TB206 harjoitussali (25)
29.03.2022 14:00 - 16:00, TAU Tietotalo TB206 harjoitussali (25)
05.04.2022 14:00 - 16:00, TAU Tietotalo TB206 harjoitussali (25)
12.04.2022 14:00 - 16:00, TAU Tietotalo TB206 harjoitussali (25)
26.04.2022 14:00 - 16:00, TAU Tietotalo TB206 harjoitussali (25)
Prerequisites
The student should know the basics of digital design and C/C++ programming before attending this course. Knowledge of VHDL/Verilog HDL is also useful, but not mandatory.Prerequisite
- Code: TIE-02201
- Name: Programming 2: Basics
- ECTS credits: 5
- Mandatory: Mandatory
- Alternativity: C programming
Prerequisite
- Code: TIE-02207
- Name: Programming 2: Basics
- ECTS credits: 5
- Mandatory: Mandatory
- Alternativity: C programming
Prerequisite
- Code: TIE-50100
- Name: Digital Design
- ECTS credits: 5
- Mandatory: Mandatory
- Alternativity: Digital design
Prerequisite
- Code: TIE-50106
- Name: Digital Design
- ECTS credits: 5
- Mandatory: Mandatory
- Alternativity: Digital design
Prerequisite
- Code: TIE-50206
- Name: Logic Synthesis
- ECTS credits: 5
- Mandatory: Advisable
Compulsory Prerequisites
- Digital Design, COMP.CE.200, 5 cr
- Digital Design, COMP.CE.200, 5 cr
Recommended Prerequisites
- Logic Synthesis, COMP.CE.240, 5 cr
- Programming 2: Structures, COMP.CS.110, 5 cr
Material
- Type: Lecture slides
- Exam material: Yes
- Language: English
Material
- Type: Book
- Name: High-Level Synthesis Blue Book
- Author: Michael Fingeroff
- Exam material: Yes
- ISBN: 978-1450097246
- Language: English
- Info: The book is available in electric format to the students
General scale, 0-5
Contact information
Email: open.studies.tau [at] tuni.fi
Phone: 0294 520 200
More information concerning Open University studies
tuni.fi/open-university
Applications to open university studies must be sent through the online application form. Please read through the application instructions in Applying to Open University studies -pages.
Some courses may require prior knowledge. Please check course info in Information about studies and Prerequisites.
After receiving confirmation email you also have to sign-up for the courses in Sisu-system. Please follow the instructions mentioned in confirmation email.
Look information at Applying to Open University studies.