Jukka Viheriälä

Dr. Jukka Viheriälä is an Associate Professor at Tampere University (TAU), where he leads a dynamic research group specializing in cutting-edge heterogeneous and hybrid packaging technologies for photonics-electronics co-packaged systems. His extensive expertise encompasses the development of innovative optoelectronic devices and integrated photonic circuits, with a strong foundation in semiconductor chip design, fabrication, testing, and advanced chip interfacing methods.

Over the past decade, Dr. Viheriälä has directed numerous projects funded by commercial partners, the European Union, and Business Finland, all aimed at pushing the boundaries of photonics and electronics integration and device performance. With more than 20 years of research experience, his work has consistently focused on the fabrication and testing of optoelectronic devices, as well as the advancement of infrastructure for micro- and nanofabrication technologies.

Dr. Viheriälä earned his Ph.D. in 2010, with a thesis dedicated to nanolithography, following his M.Sc. in 2003 on laser diode development. He has played a pivotal role in developing optoelectronic devices tailored for seamless hybrid integration with photonic integrated circuit (PIC) technology and has contributed significantly to the evolution of hybrid integration processes. Notably, he was one of the principal architects behind the System-in-Package pilot line (SiPFAB), which marked an important milestone in the field.

Beyond his academic achievements, Dr. Viheriälä has actively fostered the commercialization of research innovations at TAU and Aalto University. He has served as a Board Member, Advisory Board Member, CTO, and VP of Business Development, where he continues to bridge the gap between scientific discovery and industry application, driving technological progress in optoelectronics and photonics integration.

• III–V semiconductor chip design and fabrication, including integrated photonics
• Advanced semiconductor packaging and heterogeneous integration
• Packaging for high power / voltage / current
• Photonics–electronics co-integration and system-level integration
• Reliability, qualification, and testing of micro- and optoelectronic devices
• Industry collaboration and public–private R&D programmes
• Project management and project development
• Technology commercialisation and exploitation
• Pilot line development and research infrastructure coordination
• Cleanroom infrastructure and equipment for semiconductor chip processing, assembly, and testing
• Procurement processes and competitive tendering of cleanroom equipment

Enabling beyond state-of-the-art integrated photonics and electronics systems and devices with heterogenous integration and advanced packaging methods

• Development and optimisation of chip integration, interconnection, and packaging technologies
• Development of integrated photonic and electronic platforms
• Advanced semiconductor processing in cleanroom environments, covering fabrication, assembly, and testing
• Design and fabrication of III–V semiconductor devices for advanced electronic and photonic applications
• Research and development of cleanroom infrastructure and specialised processing/packaging equipment
• Pilot‑scale manufacturing and process transfer for emerging semiconductor technologies
• Reliability, performance, and qualification of semiconductor devices
• Translation of research results towards commercial technologies, including demonstrators and prototypes
• Support of technology commercialisation through applied research, IP generation, and industry collaboration
• Research‑driven project development supporting national and international R&D programmes