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Course unit, curriculum year 2021–2022
COMP.CE.320
High-level Synthesis, 5 cr
Tampere University
- Description
- Completion options
Teaching periods
Active in period 1 (1.8.2021–23.10.2021)
Active in period 2 (24.10.2021–31.12.2021)
Active in period 3 (1.1.2022–6.3.2022)
Active in period 4 (7.3.2022–15.5.2022)
Active in period 5 (16.5.2022–31.7.2022)
Course code
COMP.CE.320Language of instruction
EnglishAcademic years
2021–2022, 2022–2023, 2023–2024Level of study
Advanced studiesGrading scale
General scale, 0-5Persons responsible
Responsible teacher:
Sakari LahtiResponsible organisation
Faculty of Information Technology and Communication Sciences 100 %
Coordinating organisation
Computing Sciences Studies 100 %
Core content
- Fundamentals of high-level synthesis
- Scheduling of IO and memories
- Sequential and combinational hardware
- Memory architecture
- Hierarchical design
- Example designs
Complementary knowledge
- General coding style, bit-accurate data types, pipelining, unrolling
- Unconditional/conditional IO
- Shift registers, multiplexors, shifters, accumulators, adder trees, lookup tables
- Memory organization, caching
- Sharing arrays, sharing control variables, reconvergence, channels, arbitration, feedback
- FIR filter, FFT examples
Learning outcomes
Prerequisites
Compulsory prerequisites
Recommended prerequisites
Further information
Learning material
Equivalences
Studies that include this course
Completion option 1
Passed exam and exercises.
Completion of all options is required.
Participation in teaching
11.01.2022 – 29.04.2022
Active in period 3 (1.1.2022–6.3.2022)
Active in period 4 (7.3.2022–15.5.2022)
Exam
03.05.2021 – 29.10.2021
Active in period 1 (1.8.2021–23.10.2021)
Active in period 2 (24.10.2021–31.12.2021)
02.05.2022 – 15.05.2022
Active in period 4 (7.3.2022–15.5.2022)
16.05.2022 – 29.05.2022
Active in period 5 (16.5.2022–31.7.2022)
30.05.2022 – 12.06.2022
Active in period 5 (16.5.2022–31.7.2022)