Vishnu Unnikrishnan

My research is broadly on developing architectures, circuit techniques and signal processing concepts towards energy-efficient high-performance analog/digital/RF/mixed-signal integrated circuits and systems in nanometer-scale CMOS nodes. A dominant theme is to explore the possibility of building analog/mixed-signal circuits with digital/switch components by utilizing time-based parameters of pulse waveform for representation of analog information, thus improving the scaling-friendliness and cross-technology portability of analog interfaces. Starting from behavioral modeling of systems and communication links along with underlying nonidealities, we develop new system architectures and circuit techniques to push the performance boundary, and validate them in Silicon by designing and characterizing prototype chips in nanometer-scale CMOS technologies. Application areas of interest include 5G-Advanced/6G wireless transceivers, high-speed serial links and wireline transceivers, biomedical electronics etc. The group works in close collaboration with the SoC Hub, an ecosystem created Tampere University and a consortium of local businesses to boost research and education in the area of system-on-chip design, thus achieving synergy with industrial interests.

Applications are invited from highly motivated and talented individuals towards doctoral studies and postdoctoral research (salaried positions), throughout the year. Paid master thesis work and summer jobs are also available in the area of IC design and signal processing. Please contact for more information.

Active research areas/projects include the following, but are not limited to those.

• Time-Based Data Conversion Circuits (VCO-based ADCs, time-based ADCs, TDCs, time-interleaved ADCs)
• High-Speed Serial Links (SerDes, wireline transceivers, waveform design)
• Wireless Transceiver Circuits for 5G/6G (Wideband receivers, beamforming, wideband transmitters)
• Digital-assistance for analog interfaces (Linearization of ADCs, linearization of PAs, compensation of mismatch errors and layout effects in transceiver circuits)
• Efficient implementation of digital circuits like filters and arithmetic circuits towards high-speed and low-power operation

Integrated circuits and systems, analog/rf/mixed-signal circuits, microelectronics

Funding:

• EU Marie Curie ITN (SMArT, 860921): 818 kEUR
• Academy of Finland Project Funding (2021, 351235): 821 kEUR

1. A. Ghosh, A. Spelman, T. H. Cheung, D. Boopathy, K. Stadius, M. D. Gomony, M. Valkama, J. Ryynänen, M. Kosunen, V. Unnikrishnan, "Reconfigurable Signal Processing and DSP Hardware Generator for 5G and Beyond Transmitters," in IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 32, no. 1, pp. 4-15, Jan. 2024, doi: 10.1109/TVLSI.2023.3326159.
2. A. Fischer-Bühner, A. Brihuega, L. Anttila, M. Turunen, V. Unnikrishnan, M. D. Gomony, M. Valkama, "Sparsely Gated Mixture of Experts Neural Network For Linearization of RF Power Amplifiers," in IEEE Transactions on Microwave Theory and Techniques, 2023, doi: 10.1109/TMTT.2023.3341616.
3. V. Lampu, G. Xu, A. Brihuega, M. Kosunen, V. Unnikrishnan, J. Ryynänen, C. Fager, M. Valkama, "Multilevel Outphasing With Over-the-Air Combining in Large Antenna Arrays," in IEEE Transactions on Communications, vol. 71, no. 12, pp. 7347-7362, Dec. 2023, doi: 10.1109/TCOMM.2023.3312683.
4. K. Spoof, M. Tenhunen, V. Unnikrishnan, K. Stadius, M. Kosunen and J. Ryynänen, "True-Time-Delay Receiver IC With Reconfigurable Analog and Digital Beamforming," in IEEE Access, vol. 10, pp. 116375-116383, 2022, doi: 10.1109/ACCESS.2022.3219938.
5. O. Järvinen et al., "Energy-Efficient Cyclic-Coupled Ring Oscillator With Delay-Based Injection Locking," in IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 69, no. 9, pp. 3709-3713, Sept. 2022, doi: 10.1109/TCSII.2022.3176805.
6. O. Järvinen, I. Kempi, V. Unnikrishnan, K. Stadius, M. Kosunen and J. Ryynänen, "Fully Digital On-Chip Wideband Background Calibration for Channel Mismatches in Time-Interleaved Time-Based ADCs," in IEEE Solid-State Circuits Letters, vol. 5, pp. 9-12, 2022, doi: 10.1109/LSSC.2022.3145918.
7. O. Järvinen, V. Unnikrishnan, W. Siddiqui, T. Korhonen, K. Koli, K. Stadius, M. Kosunen, J. Ryynänen, "A 100–750 MS/s 11-Bit Time-to-Digital Converter With Cyclic-Coupled Ring Oscillator," in IEEE Access, vol. 9, pp. 48147-48156, 2021, doi: 10.1109/ACCESS.2021.3068838.
8. V. Unnikrishnan, O. Järvinen, W. Siddiqui, K. Stadius, M. Kosunen and J. Ryynänen, "Data Conversion With Subgate-Delay Time Resolution Using Cyclic-Coupled Ring Oscillators," in IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 29, no. 1, pp. 203-214, Jan. 2021, doi: 10.1109/TVLSI.2020.3031028.
9. K. Spoof, M. Zahra, V. Unnikrishnan, K. Stadius, M. Kosunen and J. Ryynänen, "A 0.6–4.0 GHz RF-Resampling Beamforming Receiver With Frequency-Scaling True-Time-Delays up to Three Carrier Cycles," in IEEE Solid-State Circuits Letters, vol. 3, pp. 234-237, 2020, doi: 10.1109/LSSC.2020.3012654.
10. K. Spoof, V. Unnikrishnan, M. Zahra, K. Stadius, M. Kosunen and J. Ryynänen, "True-Time-Delay Beamforming Receiver With RF Re-Sampling," in IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 67, no. 12, pp. 4457-4469, Dec. 2020, doi: 10.1109/TCSI.2020.3005475.
11. O. Olabode, M. Kosunen, V. Unnikrishnan, T. Palomäki, T. Laurila; K. Halonen, J. Ryynänen, "Time-Based Sensor Interface for Dopamine Detection," in IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 67, no. 10, pp. 3284-3296, Oct. 2020, doi: 10.1109/TCSI.2020.3008363.
12. V. Unnikrishnan and M. Vesterbacka, "Mitigation of Sampling Errors in VCO-Based ADCs," in IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 64, no. 7, pp. 1730-1739, July 2017, doi: 10.1109/TCSI.2017.2670058.
13. V. Unnikrishnan and M. Vesterbacka, "Time-Mode Analog-to-Digital Conversion Using Standard Cells," in IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 61, no. 12, pp. 3348-3357, Dec. 2014, doi: 10.1109/TCSI.2014.2340551.

Full list here.