Course Catalog 2008-2009 Basic Basic Pori International Postgraduate Open University |Degrees|     |Study blocks|     |Courses|

Course´s person responsible

Olli Vainio

Implementations

	Lecture times and places	Target group recommended to
Implementation 1

Requirements

Exam and compulsory exercise work.
Completion parts must belong to the same implementation

Principles and baselines related to teaching and learning

-

Objectives

To learn post-synthesis (backend) design of ASICs.

Content

Content	Core content	Complementary knowledge	Specialist knowledge
1.	Transistors, wires, and parasitic components in ICs.
2.	Floorplanning, clock tree generation, supply wiring, and the nonidealities therein.
3.	Placement and routing of standard cells, netlist extraction, backannotation.
4.	Cell design and optimization, timing issues, memory cell design.
5.	Large system chips.

Study material

Type	Name	Author	ISBN	URL	Edition, availability, ...	Examination material	Language
Book	Digital Integrated Circuits: A Design Perspective	J.M. Rabaey, A. Chandrakasan, B. Nicolic	0-13-120764-4		2nd edition		English
Online book	Application-Specific Integrated Circuits	M. J. S. Smith	0-201-50022-1		http://www.edacafe.com/books/ASIC/ASICs.php		English

Prerequisites

Additional information

The course is given only every other year.

More precise information per implementation

	Description	Methods of instruction	Implementation
Implementation 1		Lectures Excercises Practical works	Contact teaching: 0 % Distance learning: 0 % Self-directed learning: 0 %

Last modified	21.01.2009
Modifier	Olli Vainio