Kuva: Antti Nurmi
In his doctoral dissertation, MSc (Tech) Kari Hepola developed new tools and methodologies that simplify the design, programming, and optimization of custom processors based on the open RISC-V architecture. The research enables engineers to automatically generate both the processor hardware and the compiler from a single description, and introduces a novel multi-instruction-set methodology for extending RISC-V with static multi-issue capabilities while maintaining high energy efficiency. The work culminated in a 22-nm tape-out of a custom digital signal processor designed and programmed using the proposed toolset.
The doctoral dissertation titled Tools and Methodologies for Custom RISC-V Processors by MSc (Tech) Kari Hepola will be publicly examined at the Faculty of Information Technology and Communication Sciences at Tampere University on 2 October 2026. The dissertation is in the field of computer engineering.
The Opponent will be Dr. César Fuguet from the National Institute for Research in Digital Science and Technology INRIA, France. The Custos will be Professor Pekka Jääskeläinen from the Faculty of Information Technology and Communication Sciences.